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Why Pine Trail performance increase is so small compared to Diamondville?

This question is being asked by many, why isn’t there almost any significant performance increase over the old Atom generation. Actually the explanation is quite simple, but first thing first, a bit of history.

2008: Intel introduced Diamondville platform, the first Atom used in netbooks and nettops. The platform was composed of the Intel Atom processor and Intel 945GSE chipset. Its memory controller was in the chipset, but this was built on 90nm process which consumed too much power for that time.

2009: By the end of the year, Intel introduced Pine Trail, which consisted of a new version of Intel Atom processor and Intel NM10 Express chipset. The difference from the old platform was that now the memory controller was moved off the external chipset, on-die with the Atom processor, the same can be said about the graphics processor. The result was a platform based on 45nm process which consumed far less power than the old combo.

The problem is that this “joint-venture” isn’t showing its advantages (except from low power consumption) when it comes memory latency. The memory latency improvement was noticed very well with AMD introduced its K8 architecture with integrated memory controller and the same was noticed when Intel introduced Nehalem. In the case of the ClawHammer and Nehalem, the memory controller is on die and connects directly to the cache subsystem via some very low latency interconnects.

The explanation is that unlike Nehalem, when Intel integrated the memory controller in Pineview it didn’t start with a brand new design. There is still a FSB connection between the CPU core and the memory controller. It is on the same die, but the CPU still needs to go through the FSB unit before it can touch the memory controller. That’s why the performance didn’t improve much, at least not as much we’d expect from a redesigned, integrated memory controller.

The reasons for doing this are: marketing, saving money and lack of competition. Intel will decide to redesign the memory controller and integrate it within the CPU when AMD, VIA or ARM processors will become a threat to the Pine Trail platform.

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